FDG6302P Datasheet, Fairchild Semiconductor

-25 V, -0.14 A continuous, -0.4 A peak. RDS(ON) = 10 Ω @ VGS= -4.5 V, RDS(ON) = 13 Ω @ VGS= -2.7 V. Very low level gate drive requirements allowing direct operation in 3 .

as a replacement for bipolar digital transistors and small signal MOSFETs. Features -25 V, -0.14 A continuous, -0.4 A p.

These dual P-Channel logic level enhancement mode field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. This dev.